In the prior art, to form an integrated circuit on a semiconductor substrate, a resist film on which is formed a circuit pattern is arranged on the surface of a semiconductor substrate. Then, layers under the resist film, such as an insulation film, a semiconductor film, or a metal film, are etched through the resist film. The resist film is removed from the substrate surface after ending the etching process. One example of a method for removing the resist film is a dry processing method for ashing (incinerating) the resist film using the plasma of reactive gas, mainly oxygen plasma.
The dry processing method causes reaction of active species (radicals), mainly oxygen radicals, generated in the plasma of the reactive gas, in the resist film applied to the substrate, to decompose and vaporize the resist film to CO2 and H2O for removal. Patent document 1 discloses an example of a plasma ashing device for removing a resist film through the dry processing method. This ashing device will be described with reference to FIG. 9.
As shown in FIG. 9, an ashing device includes a chamber (processing chamber) 1, the upper part of which is coupled to a feed tube 2. The feed tube 2 is connected to a plasma chamber (not shown), which generates plasma with microwaves and reaction gases (e.g., oxygen, nitrogen, and carbon tetrafluoride) A shower plate 3, which includes a plurality of through holes, is arranged at the lower end of the feed tube 2 facing toward a substrate stage 4. A cylindrical diffusion prevention wall 5 is attached to an upper inner surface of the processing chamber 1 so as to extend around the shower plate 3. A high frequency power supply 6 is connected to the substrate stage 4. A ventilation port 7 is formed at the bottom of the chamber 1.
The ashing process performed by the ashing device formed in such a manner will now be described. First, a substrate (wafer) W loaded into the chamber 1 is arranged on an upper surface of the substrate stage 4. The interior of the chamber 1 is depressurized, and high frequency voltage (RF bias) is applied to the substrate stage 4. Then, gas containing oxygen radicals is supplied to the chamber 1 through the feed tube 2 from the plasma chamber (not shown). The gas containing oxygen radicals flows through the through holes of the shower plate 3 and reaches the substrate W. The gas flowing outward from the shower plate 3 is guided by the diffusion prevention wall 5 towards the substrate W. A resist film (not shown) formed on the upper surface of the substrate W is decomposed and vaporized by the oxygen radicals contained in the gas and then discharged from the ventilation port 7.
In the integrated circuit on the semiconductor substrate, circuit elements such as transistors are connected by a metal wiring of aluminum (Al), copper (Cu,), or the like. Some integrated circuits have connection pads of which surfaces are covered by gold (Au) or the like or connection terminals formed from solder. Thus, when manufacturing the semiconductor substrate, during the ashing of the resist film, the metal wiring may be exposed and gold or solder may be formed on the surface. In such a case, the exposed metal material is sputtered by chemical reactions or physical reactions. This scatters metal atoms, and the metal atoms collect on the inner walls of the chamber 1, that is, the lower surface of the shower plate 3 and the inner circumferential surface of the diffusion prevention wall 5. If the ashing process is continued in such a state, the metals collected on the inner walls of the chamber 1 bond with the oxygen radicals that should be guided to the substrate W. This oxidizes the metal surface and increases the amount of deactivated oxygen radicals. As a result, the amount of oxygen radicals that reaches the substrate W decreases, and the depth (ashing rate) of the resist film that can be processed during the same time decreases. Such a change in the ashing rate over time leads to a problem in which the ashing rate becomes unstable.
Actual processing was continuously performed on a large number of substrates W from which metal (here, copper) was exposed by using a single ashing device under the same conditions (condition B), and the inventors of the present invention have confirmed that the ashing rate drastically decreases as the quantity of processed substrates W increases, as shown in FIG. 10. More specifically, the ashing rate of the substrate W that was processed first after washing the ashing device was 2100.5 [Å/60 sec], whereas the ashing rate of the twentieth substrate W decreased to 1523.7 [Å/60 sec]. In other words, in the ashing process performed on the twentieth substrate W, the ashing rate decreased by about 30% compared to when processing the first substrate W.
Patent Document 1: Japanese Laid-Open Patent Publication No. 9-45495